***********************************************************
*
* PEMB4
*
* Nexperia
*
* Resistor equipped double PNP/PNP Transistor (RET)
* IC   = 100 mA
* VCEO = 50 V 
* hFE  = min. 200 @ 5V/1mA
* R1   = 10 Kohm 
* R2   = 10 Kohm   
*
*
* Package pinning does not match Spice model pinning.
* Package: SOT 666
* 
* Package Pin 1;4: Emitter   TR1;TR2 
* Package Pin 2;5: Base      TR1;TR2
* Package Pin 3;6: Collector TR2;TR1
*
*
* Extraction date (week/year): 31/2019
* Spicemodel includes temperature dependency
*
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*#
* Please note: Resistor R1 is not part of the 
* model and has to be added separately.
*
* Please note: The following model is to be used twice in 
* schematic due to equality of both Transistors.
*
.SUBCKT PEMB4 1 2 3
Q1 1 2 3 MAIN
.MODEL MAIN PNP 
+ IS = 1.656E-14
+ NF = 0.9954
+ ISE = 5.941E-15
+ NE = 1.6
+ BF = 319.1
+ IKF = 0.04633
+ VAF = 7.981
+ NR = 0.9949
+ ISC = 1E-18
+ NC = 0.9168
+ BR = 12.77
+ IKR = 0.05607
+ VAR = 24.01
+ RB = 39.4
+ IRB = 0.0001259
+ RBM = 3.4
+ RE = 0.3
+ RC = 0.3184
+ XTB = 1.141
+ EG = 1.11
+ XTI = 4.069
+ CJE = 9.067E-12
+ VJE = 0.712
+ MJE = 0.3653
+ TF = 9.5E-10
+ XTF = 18
+ VTF = 3
+ ITF = 0.7
+ PTF = 0
+ CJC = 8.778E-12
+ VJC = 0.9955
+ MJC = 0.6991
+ XCJC = 1
+ TR = 3.4E-08
+ CJS = 0
+ VJS = 0.75
+ MJS = 0.333
+ FC = 0.79
.ENDS
*