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*
* PBSS5260PAPS
*
* Nexperia
*
* Low VCEsat (BISS) double PNP/PNP Transistor
* IC   = 2 A
* VCEO = 60 V
* hFE  = typ. 250 @ 2V/100mA
* 
*
*
*
* Package pinning does not match Spice model pinning.
* Package: SOT 1118D
*
* Package Pin 1 (4): Emitter   TR1 (TR2)
* Package Pin 2 (5): Base      TR1 (TR2)
* Package Pin 6 (3): Collector TR1 (TR2)
* Package Pin 7 (8): Collector TR1 (TR2)
*
* Extraction date (week/year): 48/2015 
* Spicemodel includes temperature dependency
*
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*#
* Please note: The following model is to be used twice in 
* schematic due to equality of both Transistors.
*
* Diode D1, Transistor Q2 and resistor RQ 
* are dedicated to improve modeling of quasi
* saturation area and reverse mode operation
* and do not reflect physical devices.
*
.SUBCKT PBSS5260PAPS 1 2 3
Q1 1 2 3 MAIN 0.8303
Q2 11 2 3 MAIN 0.1697
RQ 1 11 10.25
D1 1 2 DIODE
*
.MODEL MAIN PNP
+ IS = 1.813E-013
+ NF = 0.9711
+ ISE = 4.664E-014
+ NE = 1.369
+ BF = 283
+ IKF = 1.187
+ VAF = 40.77
+ NR = 0.9733
+ ISC = 3.008E-014
+ NC = 1.146
+ BR = 19.5
+ IKR = 1.088
+ VAR = 13.42
+ RB = 26.5
+ IRB = 0.00075
+ RBM = 2.3
+ RE = 0.07908
+ RC = 0.03513
+ XTB = 1.323
+ EG = 1.11
+ XTI = 1.15
+ CJE = 1.635E-010
+ VJE = 0.7603
+ MJE = 0.3834
+ TF = 2.478E-009
+ XTF = 3.745
+ VTF = 1.98
+ ITF = 0.7421
+ PTF = 0
+ CJC = 5.029E-011
+ VJC = 0.6498
+ MJC = 0.4039
+ XCJC = 1
+ TR = 2.2E-008
+ CJS = 0
+ VJS = 0.75
+ MJS = 0.333
+ FC = 0.9546
.MODEL DIODE D
+ IS = 5.392E-014
+ N = 1.066
+ BV = 1000
+ IBV = 0.001
+ RS = 596.2
+ CJO = 0
+ VJ = 1
+ M = 0.5
+ FC = 0
+ TT = 0
+ EG = 1.11
+ XTI = 3
.ENDS
*