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*
* PBSS4160PAN
*
* Nexperia
*
* Double Low VCEsat NPN/NPN Transistor
* IC   = 1 A
* VCEO = 60 V 
* hFE  = typ. 220  @ 2V/500mA
*
* 
*
*
* Package pinning does not match Spice model pinning.
* Package: SOT 1118
* 
* Package Pin 1/4: Emitter   TR1/TR2
* Package Pin 2/5: Base      TR1/TR2
* Package Pin 6/3: Collector TR1/TR2
* Package Pin 8/7: Collector TR1/TR2
*
* Extraction date (week/year): 43/2012
* Spicemodel does not include temperature dependency
*
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*#
* Please note: The following model is to be used twice in 
* schematic due to equality of both Transistors.
*
* Diode D1 is dedicated to improve modeling in reverse
* mode of operation and does not reflect a physical device.
*
.SUBCKT PBSS4160PAN 1 2 3
Q1 1 2 3 MAIN 
D1 2 1 DIODE 
*
.MODEL MAIN NPN
+ IS = 1.087E-013
+ NF = 0.971
+ ISE = 8.291E-016
+ NE = 1.172
+ BF = 490
+ IKF = 0.2617
+ VAF = 12.05
+ NR = 0.9713
+ ISC = 1.622E-015
+ NC = 1.037
+ BR = 91.77
+ IKR = 3.258
+ VAR = 39
+ RB = 29
+ IRB = 0.00025
+ RBM = 1.47
+ RE = 0.04181
+ RC = 0.09036
+ XTB = 0
+ EG = 1.11
+ XTI = 3
+ CJE = 1.084E-010
+ VJE = 0.6513
+ MJE = 0.3226
+ TF = 9.123E-010
+ XTF = 35
+ VTF = 1.779
+ ITF = 1.719
+ PTF = 0
+ CJC = 1.199E-011
+ VJC = 0.1376
+ MJC = 0.2272
+ XCJC = 1
+ TR = 3.27E-008
+ CJS = 0
+ VJS = 0.75
+ MJS = 0.333
+ FC = 0.8681
.MODEL DIODE D
+ IS = 7.145E-014
+ N = 1.063
+ BV = 1000
+ IBV = 0.001
+ RS = 271.8
+ CJO = 0
+ VJ = 1
+ M = 0.5
+ FC = 0
+ TT = 0
+ EG = 1.11
+ XTI = 3
.ENDS
*