***********************************************************
*
* PBSS4112PAN
*
* Nexperia
*
* Double Low VCEsat NPN/NPN Transistor
* IC   = 1 A
* VCEO = 120 V 
* hFE  = typ. 100  @ 2V/500mA
*
* 
*
*
* Package pinning does not match Spice model pinning.
* Package: SOT 1118
* 
* Package Pin 1/4: Emitter   TR1/TR2
* Package Pin 2/5: Base      TR1/TR2
* Package Pin 6/3: Collector TR1/TR2
* Package Pin 8/7: Collector TR1/TR2
*
* Extraction date (week/year): 43/2012
* Spicemodel does not include temperature dependency
*
**********************************************************
*#
* Please note: The following model is to be used twice in 
* schematic due to equality of both Transistors.
*
* Diode D1 is dedicated to improve modeling in reverse
* mode of operation and does not reflect a physical device.
*
.SUBCKT PBSS4112PAN 1 2 3
Q1 1 2 3 MAIN 
D1 2 1 DIODE 
*
.MODEL MAIN NPN
+ IS = 1.314E-013
+ NF = 0.9731
+ ISE = 2.464E-015
+ NE = 1.26
+ BF = 275.8
+ IKF = 0.2297
+ VAF = 22.93
+ NR = 0.9733
+ ISC = 8.551E-017
+ NC = 1.037
+ BR = 29
+ IKR = 29.74
+ VAR = 39
+ RB = 29
+ IRB = 0.000215
+ RBM = 4.6
+ RE = 0.01575
+ RC = 0.08017
+ XTB = 0
+ EG = 1.11
+ XTI = 3
+ CJE = 2.084E-010
+ VJE = 0.6666
+ MJE = 0.3234
+ TF = 1.343E-009
+ XTF = 41
+ VTF = 1.779
+ ITF = 1.209
+ PTF = 0
+ CJC = 1.835E-011
+ VJC = 0.4098
+ MJC = 0.3774
+ XCJC = 1
+ TR = 4E-007
+ CJS = 0
+ VJS = 0.75
+ MJS = 0.333
+ FC = 0.7544
.MODEL DIODE D
+ IS = 1.023E-013
+ N = 1.008
+ BV = 1000
+ IBV = 0.001
+ RS = 418.2
+ CJO = 0
+ VJ = 1
+ M = 0.5
+ FC = 0
+ TT = 0
+ EG = 1.11
+ XTI = 3
.ENDS
*