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*
* PBSS4041SN
*
* Nexperia
*
* Low VCEsat double NPN/NPN (BISS) Transistor
* Ic   = 6,7 A
* Vceo = 60  V 
* hFE  = typ. 500 @ 2V/500 mA 
* 
*
*
*
* Package pinning does not match Spice model pinning.
* Package: SOT 96-1
*  
* Package Pin 1;5: Emitter;Collector
* Package Pin 2;6: Base;collector
* Package Pin 3;7: Emitter;Collector
* Package Pin 4;8: Base;Collector
*
* Extraction date (week/year): 08/2018
* Spicemodel includes temperature dependency
*
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*#
* Please note: The following model is to be used twice in 
* schematic due to equality of both Transistors
*
* Diode D1 is dedicated to improve modeling in reverse
* mode of operation and does not reflect a physical device
*
.SUBCKT PBSS4041SN 1 2 3
Q1 1 2 3 PBSS4041SN
D1 2 1 DIODE
*
.MODEL PBSS4041SN NPN
+ IS = 2.699E-012
+ NF = 0.9827
+ ISE = 5.649E-014
+ NE = 1.387
+ BF = 730
+ IKF = 2.123
+ VAF = 7.318
+ NR = 0.982
+ ISC = 5.895E-017
+ NC = 0.9708
+ BR = 300
+ IKR = 2.298
+ VAR = 21.58
+ RB = 20
+ IRB = 0.0006
+ RBM = 3.3
+ RE = 0.018
+ RC = 0.007
+ XTB = 0.429
+ EG = 1.11
+ XTI = 9.618
+ CJE = 9.356E-010
+ VJE = 0.7562
+ MJE = 0.3541
+ TF = 1.5E-009
+ XTF = 7
+ VTF = 1.1
+ ITF = 2
+ PTF = 0
+ CJC = 1.388E-010
+ VJC = 0.4612
+ MJC = 0.4336
+ XCJC = 1
+ TR = 3.6E-009
+ CJS = 0
+ VJS = 0.75
+ MJS = 0.333
+ FC = 0.9
.MODEL DIODE D
+ IS = 2.758E-013
+ N = 0.9906
+ BV = 1000
+ IBV = 0.001
+ RS = 2555
+ CJO = 0
+ VJ = 1
+ M = 0.5
+ FC = 0
+ TT = 0
+ EG = 1.11
+ XTI = 3
.ENDS
*