*********************************************************** * * PBSS2515VS * * Nexperia * * Low VCEsat double NPN Transistor * IC = 1 A * VCEO = 15 V * hFE = min. 150 @ 2V/100 mA * * * * * Package pinning does not match Spice model pinning. * Package: SOT 666 * * Package Pin 1;4: Emitter TR1;TR2 * Package Pin 2;5: Base TR1;TR2 * Package Pin 3;6: Collector TR2;TR1 * * * Extraction date (week/year): 23/2019 * Spicemodel includes temperature dependency * ********************************************************** *# * Please note: The following model is to be used twice in * schematic due to equality of both Transistors. * .SUBCKT PBSS2515VS 1 2 3 Q1 1 2 3 MAIN * .MODEL MAIN NPN + IS = 2.466E-14 + NF = 0.9345 + ISE = 7.379E-15 + NE = 1.789 + BF = 420 + IKF = 1.183 + VAF = 24.76 + NR = 0.9346 + ISC = 6.966E-15 + NC = 1.374 + BR = 205 + IKR = 0.3525 + VAR = 22.62 + RB = 33 + IRB = 2E-05 + RBM = 4.4 + RE = 0.1074 + RC = 0.1711 + XTB = 0.966 + EG = 1.11 + XTI = 11.66 + CJE = 3.84E-11 + VJE = 0.7276 + MJE = 0.3484 + TF = 7E-10 + XTF = 2.746 + VTF = 1.8 + ITF = 0.5778 + PTF = 0 + CJC = 1.222E-11 + VJC = 0.4 + MJC = 0.2615 + XCJC = 1 + TR = 1E-09 + CJS = 0 + VJS = 0.75 + MJS = 0.333 + FC = 0.8 .ENDS *