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*
* NUP1301
*
* Nexperia
*
* Ultra low capacitance ESD protection array
* VRWM = 80V
* Cd   = 0,75pF @ f = 1MHz, VR = 0V
* IRM  = 100nA  @ VRWM = 80V
*
*
*
*
* Package pinning does not match Spice model pinning.
* Package: SOT23
*
* Package Pin 1: Ground
* Package Pin 2: Supply Voltage
* Package Pin 3: Input/Output
*
*
* Extraction date (week/year): #
* Simulator: SPICE3
*
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*
* Please note: This device is an array and the
* symbol has to be placed twice on the schematic.
*
* The resistor R1 does not reflect 
* a physical device. Instead it
* improves modeling in the 
* reverse mode of operation.
*
.SUBCKT NUP1301 1 2
R1 1 2 9.484E+9 
D1 1 2 NUP1301 
*
.MODEL NUP1301 D 
+ IS = 3.977E-9 
+ N = 1.929 
+ BV = 110 
+ IBV = 1.0E-4 
+ RS = 1.27 
+ CJO = 5.69E-13 
+ VJ = 0.638 
+ M = 0.1 
+ FC = 0.5 
+ TT = 2.1640E-9 
+ EG = 1.1 
+ XTI = 3 
.ENDS
*